Alliance Memory Launched 256M High-Speed CMOS SDRAMs in the 86-Pin TSOP II Package

2023-11-02 ALLIANCE News

SAN CARLOS, Calif. — June 23, 2016 — ALLIANCE Memory extended its offering of 256M high-speed CMOS synchronous DRAMs (High-Speed CMOS SDRAM) with two x32 devices in the 86-pin 400-mil plastic TSOP II package.


Internally configured as four banks of 8M word x 32 bits, the high-density AS4C8M32S-6TIN and AS4C8M32S-7TCN provide reliable drop-in, pin-for-pin-compatible replacements for a number of similar solutions in industrial, commercial, medical, telecom, and networking products requiring high memory bandwidth. The SDRAMs offer a synchronous interface, operate from a single +3.3-V (± 0.3V) power supply, and are lead (Pb)- and halogen-free.


The devices feature fast access time from clock down to 5.4ns and clock rates to 166MHz, and they are available in commercial (0℃ to +70℃) and industrial (-40℃ to +85℃) temperature ranges. The SDRAMs provide programmable read or write burst lengths of 1, 2, 4, 8, or full pages, with a burst termination option. An auto pre-charge function provides a self-timed row pre-charge initiated at the end of the burst sequence. Easy-to-use refresh functions include auto- or self-refresh, while a programmable mode register allows the system to choose the most suitable modes to maximize performance.


The AS4C8M32S-6TIN and AS4C8M32S-7TCN are Alliance Memory’s full line of high-speed SDRAMs, which includes components with densities of 16Mb, 64Mb, 128Mb, 256Mb, and 512Mb in the 50-pin TSOP II, 54-pin TSOP II, 54-ball TFBGA, 86-pin TSOP II, and 90-ball TFBGA packages. For Alliance Memory customers, the devices eliminate costly redesigns by providing long-term support for end-of-life (EOL) components. In addition, the company doesn’t perform die shrinks, which frees up engineering resources.


Device Specification Table (new x32 products in bold):

Samples and production quantities of the SDRAMs are available now.

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本文由涂抹转载自ALLIANCE News,原文标题为:Alliance Memory Launches New 256M High-Speed CMOS SDRAMs in the 86-Pin TSOP II Package,本站所有转载文章系出于传递更多信息之目的,且明确注明来源,不希望被转载的媒体或个人可与我们联系,我们将立即进行删除处理。

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