Brite Semiconductor Announces Availability of High Performance 4.5Gbps/lane MIPI D-PHY IP
Brite Semiconductor (Shanghai) Co., Ltd. (BriteSemi, 688691), a leading customized ASIC and IP provider, today announced the availability of high performance 4.5Gbps per lane MIPI D-PHY IP. BriteSemi’s MIPI D-PHY supports speed up to 4.5Gbps per lane and an aggregate data rate of 18Gbps, which can provide high-performance MIPI D-PHY solutions that meet the needs of high speed communication.
BriteSemi's MIPI D-PHY IP is a high-speed, low-power and small-area IP, provides our customers the most optimized performance, power and area (PPA). It can be configured as a MIPI master or MIPI slave, supports camera interface CSI-2 and display interface DSI-2, and is backward compatible with the previous generations of each MIPI specification. In addition, the IP is compliant with MIPI D-PHY v2.5 features, such as Spread Spectrum Clocking (SSC) and transmit equalization (de-emphasis).
The development of mobile devices requires higher bandwidth, and the SoC designs are becoming more complex. BriteSemi’s high-performance 4.5G MIPI D-PHY IP has successfully taped out, and verified the function test and performance test for silicon-proven. BriteSemi can provide camera & display needs, high-frequency, integrated solutions to customers with MIPI D-PHY, MIPI CSI controller and DSI controller.
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本文由玄子转载自Brite Official Website，原文标题为:Brite Semiconductor Announces Availability of High Performance 4.5Gbps/lane MIPI D-PHY IP，本站所有转载文章系出于传递更多信息之目的，且明确注明来源，不希望被转载的媒体或个人可与我们联系，我们将立即进行删除处理。
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